| 摘要 |
PURPOSE:To effectively separate elements from one another by applying voltage which is out of the variation range of the applying voltage to each electrode of the source and the drain of a FET or a bipolar transistor to part of a plurality of separation layers or a substrate. CONSTITUTION:Comparatively high concentration nBL, pBL layers are buried by a well known method in a p-type Si substrate and the collector resistance of an npn bipolar BIP element and the resistances of an nWELL and a pWELL are reduced. A high concentration layer CN is also provided between a collector C WELL voltage VBB2 to reduce the resistance. A pMOS and an nMOS are formed in the nWELL and the pWELL respectively and a BIP collector layer is formed by using part of the nWELL. Voltage higher or lower than the range of operating voltage is applied according to a purpose to one or both substrate voltage VBB1 for element separation and the WELL voltage VBB2, e.g., if negative voltage is applied to the (n) layer in the pWELL, an erroneous operation is perfectly prevented if the VBB1 which is not made the forward bias of the p-type substrate and the (n) layer is selected.
|
