| 摘要 |
PURPOSE:To eliminate time for address counting and time for address decoding at the time of serial access by constituting a ring counter using a shift register in an address decoder section to speed up read/write of serial data. CONSTITUTION:An X ring counter 21 has input and output of 2<m> bits and has function of setting initial value of count. Input is connected to a decode output section of an X address decoder 3, and output of the X ring counter 21 is connected respectively to X address line of a memory matrix 1. The X ring counter 21 makes counting operation by count pulse from a count pulse generating circuit 20 by a multiple of two, that is, makes counting of only 2<k> (k=0,1,2...m-1). Accordingly, X address line of the memory matrix 1 is controlled by output of the X ring counter 21 and always only 1 line is selected. A Y ring counter 22 has input and output of 2<n> bits and constituted similarly.
|
