发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain an MOS capacitor, which can suppress the elongation of a depletion layer, can decrease the occurring rate of soft errors and can suppress the decreased in p-n junction withstanding voltage of an Hi-C cell, by providing a high-concentration impurity diffused layer, which has a reverse-conductivity type with respect to a substrate, a low- concentration impurity diffused layer and a high-concentration impurity diffused layer, which has the same conductivity type as the substrate, beneath a gate insulating film. CONSTITUTION:From the surface of a one-conductivity type semiconductor substrate 1 to the inward side, a high-concentration impurity diffused layer 4, which has a reverse conductivity type with respect to the substrate 1, a low-concentration impurity diffused layer 3, which has the reverse conductivity type with respect to the substrate 1, and a high-concentration impurity diffused layer 2, whose conductivity type is the same as that of the substrate and impurity concentration is higher than that of the substrate 1, are sequentially laminated. A gate electrode 6 is formed on said reverse conductivity type high-concentration diffused layer 4 through a gate insulating film 5. For example, an MOS capacitor is constituted by the following parts: the p-type silicon substrate 1; the gate oxide film 5, is formed on the oxide film and coprises phosphorus doped polysilicon; and an n<+>n<->p<+> junction, which coprises the n<+> type impurity diffused layer 4, the n<-> type impurity diffused layer 3 and the p<+> type impurity diffused layer 2 that are sequentially formed beneath the gate oxide film.
申请公布号 JPS62118571(A) 申请公布日期 1987.05.29
申请号 JP19850258979 申请日期 1985.11.19
申请人 MATSUSHITA ELECTRONICS CORP 发明人 TAKENAKA NOBUYUKI
分类号 H01L27/10;G11C11/34;H01L21/8242;H01L27/108 主分类号 H01L27/10
代理机构 代理人
主权项
地址