发明名称 SYSTEM FOR TRANSFERRING DATA BETWEEN PROCESSORS
摘要 PURPOSE:To attain the address designation of a information accommodation buffer memory at the reception side by providing a register for sending the kind of transmission/reception information in a direct memory access DMA transfer seequence between processors. CONSTITUTION:In applying DMA transfer between the 1st processor 1 and the 2nd processor 9, when the information to be sent is stored in a buffer memory 2, the processor 1 sets an address of the memory 2 to the 1st DMA section 5. That is, the address of the memory 2 is set as a transmission memory address and the number of transmission data is set to the DMA section 5. Then the kind of information is set to a register 8, an interruption is given to the processor 9 being the reception side via an interruption line 15 and the processor 9 reads the kind of information from the register 8. Then a buffer memory corresponding to the kind of information is obtained from buffer memories 10-12 at the processor 9 and the information storage buffer memory address at the reception side is designated.
申请公布号 JPS62115565(A) 申请公布日期 1987.05.27
申请号 JP19850254808 申请日期 1985.11.15
申请人 HITACHI LTD;HITACHI TSUSHIN SYST KK 发明人 OOTA GENSUKE;WATANUKI TOSHIAKI
分类号 G06F15/16;G06F13/38;G06F15/177 主分类号 G06F15/16
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