发明名称 LOGICAL OPERATION CIRCUIT
摘要 PURPOSE:To obtain a logical operation circuit constituted in a small scale by providing a rotator, plural first kind of registers, plural second kind of registers, and an arithmetic means at a logical operation circuit. CONSTITUTION:A rotator has the same data width as the data width of one word at an image memory 23, and a source data on one side of a pair of source data from the image memory 23 is operated and rotated. Plural first kind of registers 1 and 2 hold the result of a rotate operation required for the bit boundary alignment of the source data. Plural second kind of registers 12 and 13 hold the source data on the other side, bits of mask information, and the result of the rotate operation at the last cycle. A calculator 16 is controlled by a sequence control part 22 based on bits of mask information 3-10 given from a main body control part 20, a bit of rotate number designation information, and a bit of logical operation designation information. And a logical operation is executed against the content of the image memory 23 accessed by an address control part 21.
申请公布号 JPS62115527(A) 申请公布日期 1987.05.27
申请号 JP19850256288 申请日期 1985.11.15
申请人 NEC CORP 发明人 KATO HIDEAKI
分类号 G06F7/00;G06F7/76;G09G1/02;G09G1/16;G09G5/00;G09G5/36;G09G5/39 主分类号 G06F7/00
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