发明名称 OSCILLATION PREVENTION CIRCUIT FOR LOGIC CIRCUIT
摘要 PURPOSE:To prevent oscillation due to an increase in a discharged current by providing a current limit circuit connected between the power source wiring of a logic circuit and an external power source. CONSTITUTION:The oscillation prevention circuit of the logic circuit (b) installs the current limit circuit 28 between the power source wiring of the logic circuit having plural output terminals connected to capacitors 9a-9z and the external power source. The titled circuit is constructed of a logic integrated circuit 1a, a logic circuit 1b, the current limit circuit 28, SBD NPN transistors 29 and 30 comprising the current limit circuit, resistances 31 and 32 comprising the current limit circuit and Schottky barrier diodes 33a-33z supplying a power source to noninverter circuits 6a-6z from a power source wiring 10. If the part of the logic circuit 1b does not satisfy conditions for oscillation, a drop in the voltage of the current limit circuit 28 can be negligible, whereby the part of the logic circuit 1b can act as a conventional integrated circuit 1 does. Thus the logic circuit can be caused to securely avoid from oscillating.
申请公布号 JPS62115919(A) 申请公布日期 1987.05.27
申请号 JP19850185063 申请日期 1985.08.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKI YOICHIRO
分类号 H03K19/003;H03K17/62;H03K19/00;H03K19/088 主分类号 H03K19/003
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