发明名称 RECEIVING/PHASING CIRCUIT
摘要 PURPOSE:To realize a small-sized high performance low cost receiving/phasing part, by mounting a sampling circuit and a sampling time control circuit in the same IC with respect to the same receiving element. CONSTITUTION:A sampling circuit SA, a sampling time control circuit CG and a memory circuit Mo preliminarily storing data required in the variable control of sampling time are mounted in the same IC. Only the input signal line 1 and output signal line 2 of signal lines led out to the outside of IC are operated during phasing operation. The giving and receiving of the clock or pulse signal corresponding to the sampling time of this receiving element is closed in IC and it is prevented that the signals of said signal lines 1, 2 are mixed in the signal from the other receiving element to generate noise after phasing and addition. Further, a transmission synchronous signal 3 and a memory writing terminal 4 are provided. Because the terminal 4 is used only at the time of the manufacturing of a phasing circuit, the number of IC pins are reduced and the advantageousness in the miniaturization of IC is achieved.
申请公布号 JPS62116255(A) 申请公布日期 1987.05.27
申请号 JP19850254797 申请日期 1985.11.15
申请人 HITACHI MEDICAL CORP 发明人 UMEMURA SHINICHIRO;KONDO SHINICHI;KATAKURA KAGEYOSHI;OGAWA TOSHIO;IKEDA HIROSHI
分类号 A61B8/00;G01N29/04 主分类号 A61B8/00
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