发明名称 BI-CMOS GATE ARRAY
摘要 PURPOSE:To judge the acceptance of manufacture by providing a circuit for connecting with a passage for supplying a base current to a bipolar transistor which forms a push-pull circuit that is turned ON when the output of an interface circuit goes to a low level to interrupt the base current to measure only a leakage current. CONSTITUTION:A P-channel MOS transistor 14 and a control terminal 15 are provided. The terminal 15 is held at a low level at a normal operation mode time to set a P-channel MOS transistor 14 to ON to supply a base current to an NPN transistor 9. When measuring a power source current, the terminal 3 is set to a high level, and the transistor 14 is set to OFF to interrupt a current flowing to the base of the transistor 9 and a resistor 10 through an NPN transistor 5. Accordingly, the power source current having only a leakage current can be accurately measured. Thus, a circuit for interrupting the base current flowing to the ON bipolar transistor of a push-pull output stage is controlled from an external terminal to provide only leakage current in the power source current to obtain one parameter of judging whether the Bi-CMOS gate array is normally manufactured or not by measuring the power source current.
申请公布号 JPS62115843(A) 申请公布日期 1987.05.27
申请号 JP19850257107 申请日期 1985.11.15
申请人 NEC CORP 发明人 YOSHIDA TAKETO
分类号 H01L27/118;H01L21/82;H01L21/8249;H01L27/06 主分类号 H01L27/118
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