Digital-to-Analog converter with output sampler.

摘要

A high speed monolithic current switching digital-to-analog converter (DAC) having a sampled output is provided. The DAC (10) includes an output sampling circuit (9) which is an on/off switch rather than a sample and hold circuit. Elimination of a holding capacitor results in faster switching and less error. The sampler (9) is a differential, triple balanced architecture which steers the DAC's differential outputs alternately to a load resistor via a balancing transformer (11) and to ground. The sampler (9) includes a three-stage, AC coupled GaAs pre-amp (15) which provides a complementary clock to drive the sampler.