| 摘要 |
PURPOSE:To prevent the change of a monitor voltage even if the mark rate of an input optical signal is changed, by synthesizing a bias voltage value and a value, which is obtained by dividing a DC current flowing to an APD by the mark rate of the input optical signal, to obtain a monitor level. CONSTITUTION:The output of a data discriminating circuit 10 is processed by an LPF 13 to become a DC voltage VM proportional to the mark rate (m) of the optical pulse signal and is supplied to a divider 14. A voltage VDC proportional to the DC current supplied to an APD 1 from a differential amplifier 11 is supplied to the divider 14 also. A divided value V2=VDC/VM from the divider 14 and the bias voltage V1 of the APD 1 are synthesized by an adder 12 to become a monitor voltage V3. This voltage V3 is not changed even through the mark rate (m) is changed, and the voltage V3 is increased for the rise of the input optical level and is not affected by the mark rate. |
