发明名称 DATA TRANSFER CIRCUIT
摘要 PURPOSE:To realize not only data transfer, but also an additional function for arithmetic operation and processing by providing a dedicated processor which performs multiple control over data transfer between an input/output control part and a memory, a memory and a memory, and an input/output control part and an input/output control part and has an arithmetic and processing function for data. CONSTITUTION:The DMA control circuit of each input/output control part is omitted, and the processor MVP exclusive to fast data transfer is introduced to perform centralized control over data transfer requests of many channels and also provide the arithmetic and processing function for data. A fast program transfer system is employed without employing any DMA system to reduce circuits and also improve the use efficiency of a bus, and a dual port memory DPM which can be accessed from a main processor at any time and a control signal interface are prepared as a command parameter transfer system for the main processor MPU. Further, two systems of bus control circuits BUSC are provided to calculate and process data efficiently. Consequently, additional function for the arithmetic processing of data and data transfer among plural paths are easily realized.
申请公布号 JPS62113257(A) 申请公布日期 1987.05.25
申请号 JP19850253047 申请日期 1985.11.11
申请人 NEC CORP 发明人 MISE MASAKAZU
分类号 G06F13/38;G06F13/12 主分类号 G06F13/38
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