| 摘要 |
PURPOSE:To obtain a high dielectric strength semiconductor device for a high dielectric strength IC, by employing an impurity concentration for manufacturing a standard low voltage IC. CONSTITUTION:In an offset gate type high dielectic strength N-type MOS FET, only the offset gate part 5, the N<+>type drain part 4 and its circumferential part require a low impurity concentration. Therefore, P ions are implanted and pushed into a P-type substrate 1 whose impurity concentration is employed for manufacturing a standard low voltage IC to form a P<->type region 2 and the offset gate part 5 and the N<+>type drain 4 are formed in the P<->type region 2. With this constitution, a high dielectric strength IC device which has smaller parasitic effect than the IC device which is manufactured by a conventional low impurity concentration substrate and which tends to create a parasitic effect can be obtained. Moreover, the IC device can be manufactured only by adding the processes of forming the P<-> type layer 2 and the N<-> type offset gate 5 so that improved production efficiency can be realized.
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