发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To shorten a test time and to facilitate the formation of a test pattern by controlling the output of an address register for a memory according to the internal state of a mode register. CONSTITUTION:When the function of an IC which has 16-bit data length and 9-bit address length of the memory is tested, a signal indicating the test mode is outputted to a control signal line 7. A signal 5 is a system clock, and a signal is a write control signal for the address register; when the signal 6 is '1' and the clock rises, data are written from address registers 1 and 1' and signals on address register output signal line groups 4 and 4' vary. Then, the high-order 8 bits of address registers are outputted from an external signal group 2 and the low-order 8 bits of the address registers are outputted from the signal line group 2 in a next cycle.
申请公布号 JPS62112075(A) 申请公布日期 1987.05.23
申请号 JP19850251851 申请日期 1985.11.12
申请人 TOSHIBA CORP 发明人 KONDO KATSUHISA
分类号 G01R31/28;G01R31/319 主分类号 G01R31/28
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