发明名称 MULTIPLE CHIP PACKAGE
摘要 PURPOSE:To improve packaging density of a multiple chip package, by directly connecting a multiplayer substrate and a chip carrier with an insulating layer and a vertical wirings. CONSTITUTION:In this multiple chip package, input/output pins 3 are connected to the lower surface of a ceramic multilayer substrate 1 including a power source pattern 2 with silver solder. On the upper surface of the substrate, a plurality of polyimide insulating layers 5, in the surface of which a signal pattern 4 is formed, are arranged in a multilayer mode. On the uppermost polyimide insulating layer 5 in which vertical wirings 6 that are connected to the signal pattern 4 are formed, a chip carrier 7 is bonded to vertical wirings 8 and a polyimide insulating layer 9 which are formed at the bottom surface of the carrier. An IC chip 11 and leads 12 are provided in the chip carrier. Thus high- density packaging can be carried out.
申请公布号 JPS62111456(A) 申请公布日期 1987.05.22
申请号 JP19850250652 申请日期 1985.11.11
申请人 NEC CORP 发明人 KIMURA HIKARI;NAKAKITA SHOJI
分类号 H01L23/12;H01L23/52;H01L23/538 主分类号 H01L23/12
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