| 摘要 |
PURPOSE:To avoid unstable operation of a flip-flop from being caused due to a single fault in the titled circuit by using an output signal of the flip-flop with feedback. CONSTITUTION:In impressing an L level to a data signal line 14 and impressing an H level to a load signal line 15, when an output Qb of a flip-flop 10 is at an H level at first, an input signal Rb goes to an L and an input signal Sb goes to an H because a NAND gate 11 is inactive by a signal line 16, and an L level is loaded to the flip-flop 10. When the output of the flip-flop 10 is at an L level, the input signal Rb goes to an H because the NAND gate 12 is inactivated by a signal line 17 by impressing an L to the data signal line 14 and an H to the load signal line 15, the input signal Sb goes to an L due to a fault of an input terminal 18 and an H level is loaded to the flip-flop 10. That is, the simultaneous active state of the set and reset terminals of the flip-flop due to a single fault in the circuit is inhibited by providing the signal lines 16, 17.
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