发明名称 ARITHMETIC PROCESSOR
摘要 PURPOSE:To omit the extra operations given to the floating point data by using an arithmetic and logic unit to the arithmetic circuit for data on the exponent part of the floating point. CONSTITUTION:The floating point data A and B are supplied to the input registers 1 and 2 respectively and the data on the exponent parts of both registers 1 and 2 are supplied to an arithmetic and logic unit 3 and a data selecting circuit 5. The unit 3 performs the designated arithmetic of the data on the exponent part and then a carry flag 9 shows whether a carry is produced or not. When the arithmetic of the exponent part is carried out, the flag 9 is always kept at '0' by a signal (a). One of the outputs of the circuit 5 is selected according to the signal of the flag 9. Then the outputs of the circuit 5 and the circuit 3 are used as the input of a data selecting circuit 6. The circuit 6 selects the input given from the circuit 3 by the selection signal (a) showing whether the arithmetic of the data on the exponent part should be carried out or not.
申请公布号 JPS62109123(A) 申请公布日期 1987.05.20
申请号 JP19850250060 申请日期 1985.11.08
申请人 NEC CORP 发明人 OSUMI MASAKO;TANAKA HIDEO
分类号 G06F7/38;G06F7/00;G06F7/483;G06F7/508;G06F7/76 主分类号 G06F7/38
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