发明名称 SWITCHING CIRCUIT FOR RAM BANK OF MICROCOMPUTER
摘要 PURPOSE:To save a memory area and to reduce a processing time by selecting and outputting a bit of bank information held by either of latch circuits which hold the bit of bank information and a bit of write opposite bank information, and selecting a RAM chip in a RAM area. CONSTITUTION:When a transfer between different banks is performed, a CPU 1 writes the bit of information of an write opposite bank at a latch circuit 6, and writes a bit of information which permits the output of a bank switching signal in a memory write cycle at a switching signal generating circuit 7. For example, assuming that a data at an address (x) in a RAM bank 4(1) is transferred to an address (y) in a RAM bank 4(2), first of all, the CPU 1 reads the address (x) in a memory read cycle. Since the output of the switching signal generating circuit 7 is inactive at such a time, an instruction circuit 8 outputs the content of a latch circuit 5 holding the bit of information at the RAM bank 4(1), and the RAM bank 4(1) is selected through a selection circuit 9, and the CPU 1 reads in the content of the address (x) at the RAM bank 4(1). Next, the CPU 1 writes the read in data at the address (y), but, it is not required to transfer it tentatively to an area other than a bank.
申请公布号 JPS62109285(A) 申请公布日期 1987.05.20
申请号 JP19850248065 申请日期 1985.11.07
申请人 NEC CORP 发明人 TAKAGI NORIYUKI
分类号 G06F12/06;G11C8/00 主分类号 G06F12/06
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