| 摘要 |
PURPOSE:To obtain a high density master-slice substrate by disposing specific first - fourth basic cell group composed of MISFET pairs by a specific method to form various logic circuits only by the alteration of metal wiring level. CONSTITUTION:l-Pieces of MISFET pairs are arranged linearly to form the first basic cell group 1, (m) pieces of MISFET pairs are linearly arranged, all first conductivity type MISFETs are connected each other at gate electrodes 11, all electrodes 8 opposite side to a second conductivity type MOSFETs are connected with each other, all gate electrodes 12 of the second conductivity type MISFETs are conneced with each other to form second basic cell group 2, and the cell group composed of n pieces of MISFET pairs composed in the same configuration as the group 2 as the third basic cell group 3. The first - third basic cell groups 1-3 are sequentially arranged in one row as a unit row 28, a plurality of unit rows 28 are aligned to become source symmetry as a unit block, a block with one or more unit blocks sequentially disposed, and a block with the same number of unit rows 28 as fourth basic cells of the same configuration as the group 1 ared aligned therewith. |
