| 摘要 |
PURPOSE:To reduce the scale of an adder circuit, to simplify the whole of a device reducing the number of wires, and to suppress the increase of an operation time within only the increase due to the dynamic range of data by providing a subtraction circuit. CONSTITUTION:A time-divisional data xi inputted to a delay element 1 is delayed by every integral time tick DELTAT, and its output xK-N is inputted to a subtraction circuit 2. The circuit 2 detects a difference between the integral value at DELTAT before and the value at present and inputs it to an adder circuit 3a, and the circuit 3a adds the output value of the circuit 2 and its own output at DELTAT before, and outputs a present integral value Yi. In other words, by constituting a device so as to detect the difference between the value at DELTAT before and the value at this time providing the circuit 2, the scale of the adder circuit is reduced and the number of required wires is reduced and the whole of the device can be simplified. Also, the increase of the operation time can be suppressed within only the increase due to the dynamic range of the data.
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