| 摘要 |
PURPOSE:To reduce the phase pull-in time by increasing the phase correction width at the initial operation of phase locking to quicken the pull-in time and restoring the phase correction width after the phase pull-in thereby keeping other characteristics as phase jitter. CONSTITUTION:A frequency division ratio variable width selector 3 is provided between a loop filter 2 and a frequency division ratio variable frequency divider 4. A variable width i=n is selected at the initial state for the frequency dividing ratio variable width selector 3 and the frequency divider 4 changes 1/N frequency division into 1/(N+n) or 1/(N-n) depending on the output of the loop filter 2 so as to correct the phase. After the phase pull-in, the phase of the output of a phase comparator 1 is retarded, the phase is led or vice versa, the output changeover is detected by a detector 5 to change the variable width i=n of the selector 3 into i=1. |
