| 摘要 |
A microcomputer unit containing therein a plurality of registers each with an address allotted in advance. The registers can be accessed for monitoring by an external address signal when the allotted address thereof and the external address signal coincide with each other. In this case, operation of the microcomputer is stopped by an external HALT signal and then the content of the register to be monitored is read by a monitor (MNT) signal MNT, so that the content thereof is fed externally from the microcomputer unit.
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