发明名称 THRICE MULTIPLIER CIRCUIT
摘要 PURPOSE:To obtain a thrice output and to reduce number of pins in circuit integration by using an input signal and forming a signal having the same frequency as that of the input signal and a different phase finally and synthesizing both the signals at a synthesis circuit. CONSTITUTION:A signal S0 at an input terminal 11 is shifted by 45 deg. at a phase shift circuit comprising a resistor R2 and a capacitor C1 and the result is fed to a base of a transistor (TR) Q3. A differential operation section comprising TRs Q4, Q5, a constant current source I4 and resistors R12, R13 uses signals S2, S3 to apply vector operation of S3+(-S2) and to obtain a signal S8. A differential operation section comprising TRs Q6, Q7, a constant current source I5, and resistors R15, R16 uses signals S1, S2 to apply vector operation of S2+(-S1) and to obtain a signal S6. Further, a differential operation section comprising TRs Q8, Q9, a constant current source I6 and resistors R17, R18 and R19 uses a signal S4 to apply level adjustment. Thus, signals S8, S6 and S4 are synthesized by the synthesis section 14 to form a thrice signal.
申请公布号 JPS62107503(A) 申请公布日期 1987.05.18
申请号 JP19850247507 申请日期 1985.11.05
申请人 TOSHIBA CORP 发明人 SATO MASAYORI
分类号 H03B19/14 主分类号 H03B19/14
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