| 摘要 |
PURPOSE:To speedily produce a memory address for history dependence processing by selecting the output of a data arithmetic part in case the data is dependent on the arithmetic operation of a prescribed address and then the output of an address arithmetic register file in case the data is not dependent on said arithmetic operation respectively and delivering both outputs to an address arithmetic part. CONSTITUTION:A multiplexer 13 is connected to the input at one side of an address arithmetic part 8 and selects the output of an address arithmetic register file 7 and the output of a latch 12. The data width of the output of the register 7 supplied to the multiplexer 13 is equal to the data width is delivered from the multiplexer 13 and supplied to the part 8. However, the data width delivered from the latch 12 and supplied to the multiplexer 13 is smaller than the data width delivered from the multiplexer 13. The output given from the latch 12 is set close toward an LSB when it is supplied to the multiplexer 13. While 0 is supplied to an MSB where the input of the multiplexer 13 remains.
|
