| 摘要 |
PURPOSE:To attain ease of prescribed data transmission by providing a data output means sending a signal to a secondary station in succession to a start signal to a primary station, and providing a clock generating means and a signal reception means decoding an input data to eliminate the need for address setting to each secondary station. CONSTITUTION:In the range of voltages Vref1, Vref2, a signal being at an H level is obtained from an AND circuit 25, and a signal (c) is ANDed with the said signal at an AND circuit 27 and a signal is supplied to a data signal reception circuit 28 and a clock generating circuit 29. A start bit an a data are sent serially through the signal, a clock signal of the clock generating circuit 29 is generated by the start bit and the result is supplied to a data signal reception circuit. Thus, data D1, D2 or D3 is decoded by the clock signal, sent to a data signal recovery circuit 30 and supplied to an external equipment. Thus, only a voltage having a prescribed range substantially as the voltage V is received in each secondary station and a signal of the voltage level except it is not received.
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