| 摘要 |
PURPOSE:To quicken the transfer speed by holding an input data whose plural bits from the frame tentatively, detecting it that the stored data is all '0', executing the count by a detection output signal so as to compress the detection data thereby decreasing the storage data. CONSTITUTION:An all '0' data frame detection circuit 2 decides whether or not a data frame is all '0', and when the all '0' data exists, the detection circuit 2 brings the state of a '0' detection signal line 103 to '1..., causing a counter 3 to be counted up under the condition that the state of the '0' detection signal line 103 is logical '1'. Then a transmitted input data frame is stored in a latch circuit 1 and inputted to the detection circuit 2 via a latch output signal line 102, where whether or not all '0' exists is decided. When all '0' exists, the state of the '0' detection signal line 103 is brought into logical '1', and the counter 3 is counted up in this state and no input data is written in a storage section 6.
|
