| 摘要 |
<p>PURPOSE:To transfer data without overlapping by adding a timer and delaying data which is inputted from a register firstly after transfer is indicated by a time (t). CONSTITUTION:Information A is written in the register 1 with CLK-A and the information A is read out and stored after a muCPU 7 confirms that an IBF flag is 1. The timer 8 of the CPU 7 delays the information by a time (t) (a half as long as the period of CLK) and writes the information A in a register 2 after confirming that an OBE flag is 1, so the OBE flag becomes 0. The information A in a register 2 is moved to a register 3 at a specific point (mark X) with CLK-B and the OBE flag becomes 1. Next information B is written in the register 1 and written in the CPU 7 similarly, but the OBE flag is 0, so the information is held and written in a register after the information in the register 2 is moved to the register 3 and the flag changes into 1. When transfer starts, data are transferred without overlapping right after the information is read out of the register by the CPU when the interval T of CLK-B generation is longer than (t) only except that the point of writing to the register 2 is different.</p> |
