发明名称 DIRECT MEMORY ACCESS SYSTEM
摘要 PURPOSE:To access other input/output device and a memory device by disconnecting a signal bus part before a direct memory access device operates and connecting the signal bus part and a central processor at the end of the operation. CONSTITUTION:When data needs to be transferred between the memory device 6 and an input/output device 7, a central controller 1 operates a signal bus disconnecting device 5 at the end of access to the devices 6 and 7 when accessing them or instantaneously when not to disconnect signal buses 2 and 13 and informing an access controller 8 of that. When the data transfer between the devices 6 and 7 is completed, the access controller 8 informs the central controller 1 of th completion. The central controller 1 which receives it finishes the operation of the signal bus disconnecting device 5 and connects the signal bus parts 2 and 13 again.
申请公布号 JPS62105258(A) 申请公布日期 1987.05.15
申请号 JP19850244061 申请日期 1985.11.01
申请人 NEC CORP 发明人 KAWARADA SATORU
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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