| 摘要 |
PURPOSE:To attain a strong frame synchronism protection by detecting respectively a coincidence or a dissidence signal when the coincidence bit number with a true frame synchronizing pattern is a threshold value or over or below, allowing the device into the synchronism state with N times of consecutive coincidence signals, allowing the device to be released with M times of dissidence signals and switching the threshold value depending on whether the synchronism is present or not. CONSTITUTION:An output from a frame synchronizing pattern detecting means 1 which identifies it as concidence when the bit number coincident with the true synchronising pattern in a code length of the frame synchronizing pattern is a prescribed value or over and identifies it as dissidence when the bit number is below the threshold value among inputted digital code series is counted by count means 2, 3. When the result of count of them reaches M and N respectively, they give an output and set/reset a flip-flop 5 and also reset themselves via an OR circuit 4. An output of the flip-flop 5 is at an L level, that is, a chreshold value A1 representing the asynchronous state, is set to a threshold value A2 of the synchronous state as A1>=A2. |
