发明名称 LEVEL CONVERTING CIRCUIT
摘要 PURPOSE:To supply the output level of TTL or CMOS which has no problem in practical use with small power consumption by using an existent ECL circuit part as it is, and leading out the collector of an output emitter follower transistor (TR) as an output terminal and connecting it to a positive power source through a resistance. CONSTITUTION:Transistors Q1-Q5 and resistances R1-R3 constitute a standard ECL circuit and the collector of the TR Q5 is led out as the output terminal T1. When an input V1 has the high level, the TR Q1 is on and the Q2 is off; and the base of the TR Q4 is at the high level and the base of the Q5 is at the low level. The TRs Q4 and Q5 constitute a current switching type circuit, so the TR Q4 is on and the Q5 is off, so that a potential which is nearly as high as that of the positive power source VCC is obtained at the output terminal T1. Then, when the input V1 has the low level, the TR Q2 is off and the Q2 is on, so that a potential which is nearly as high as the ground potential GND, i.e. a potential which is usable as the low level of TTL is obtained at the output terminal T1.
申请公布号 JPS62104315(A) 申请公布日期 1987.05.14
申请号 JP19850245405 申请日期 1985.10.31
申请人 NEC CORP 发明人 TAKAHASHI TORU
分类号 H03K19/018 主分类号 H03K19/018
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