| 摘要 |
PURPOSE:To hold the degree of modulation nearly constant regardless of the position of a variable resistance by varying the voltage division value of a DC voltage dividing circuit and varying the DC current value of a current source, and inputting a modulating signal to the voltage division position of the DC voltage dividing circuit through the resistance. CONSTITUTION:The voltage division ratio (resistances R4+R6:R5+R7) is varied to vary the value of the current I of the current source 5, and the modulating signal is inputted to the voltage division position of the VR1 through the capacitor C1 and resistance R3. Namely, the resistance R3 of a modulating signal input terminal 8 is connected to the uninverted input (+) side of a buffer. Therefore, when R7 is reduced so as to lower an oscillation frequency, the modulating signal is voltage-divided small with a buffer input and when R7 is increases so as to increase the oscillation frequency, the modulating signal inputted to the buffer 7 also increases. When R3>>R5+R7, the level of the modulating signal inputted to the buffer 7 is nearly proportional to R5+R7, and consequently the degree of modulation is almost unchanged even when the oscillation frequency is varied.
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