发明名称 ANALOG-DIGITAL CONVERSION CIRCUIT
摘要 PURPOSE:To improve the stability of an A/D conversion circuit even when a clamp level is fluctuated by fixing one reference voltage of the A/D conversion circuit to a clamp level to be clamped to a black peak of an input signal. CONSTITUTION:A picture signal subject to A/D conversion is supplied to a picture input terminal 20 and subject to impedance conversion by a transistor (TR) 36, supplied to a clamp circuit comprising capacitors 21, 25, a diode 23, a TR 26 and a semi-fixed resistor 27 and then fed to an input terminal 3 of the A/D converter 12. The black peak of the picture signal is fixed to a voltage nearly equal to the base potential of the TR 26 connected to the semi-fixed resistor 27. The base potential of the TR 26 is supplied to a reference input terminal 1 as a voltage VT via an operational amplifier 17. The output from the clamp circuit is supplied to a reference input terminal 2 as a voltage VB through a peak detection circuit comprising an operational amplifier circuit 30 or the like and a comparator circuit comprising an operational amplifier 31 or the like via a buffer amplifier 37.
申请公布号 JPS62102623(A) 申请公布日期 1987.05.13
申请号 JP19850241446 申请日期 1985.10.30
申请人 HITACHI LTD 发明人 TOMATSURI KOICHI
分类号 H03M1/10;H03M1/12 主分类号 H03M1/10
代理机构 代理人
主权项
地址