发明名称 READ CIRCUIT
摘要 PURPOSE:To completely eliminate the influence of excessive compensation caused by a cosine equalizer and to improve the reliability of information reading by converting the delay amount of a delay line into an optimum value corresponding to the characteristic of a read signal. CONSTITUTION:A memory circuit 16 stores information setting a delay amount suitable for the read waveform of a magnetic head whose address is designated, transmits a binary delay setting signal to a signal line 31, on/off controls analog switches 7-12 and appropriately selects the output signals of delay lines 2 and 4. When the isolation wave semi-value width of the read signal 1 is wide, the switches 7 and 10 and the remaining ones are turned on and off, respectively. An adder 6 synthesizes the signal 1 and the output signal of the switch 10, and subtracts 27 the attenuation output 26 from a buffer output 25. If the isolation wave semi-value width of the signal 1 is narrow, only the switches 8 and 11 are turned on. As a result, no undershoot occurs in any cases, and a satisfactory waveform can be obtained accordingly.
申请公布号 JPS62102481(A) 申请公布日期 1987.05.12
申请号 JP19850241862 申请日期 1985.10.29
申请人 NEC CORP 发明人 SHIMAUJI MASAHIRO
分类号 G11B5/09;G11B20/10 主分类号 G11B5/09
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