| 摘要 |
PURPOSE:To enable display of residual voltage without adding a voltage detection circuit, by applying outputs of a limiter circuit, a constant voltage circuit and a BLD circuit into a display driver from a display decoder for input and output processing. CONSTITUTION:A timepiece comprises a solar cell 1, a secondary cell 2, a display section 3, a display driver 4, a display decoder 5, a logical circuit 6, a limiter circuit 7, a BLD circuit 8, a constant voltage circuit 9 and comparator 10. When VSB: voltage of the secondary cell 2, VSR: a limiter voltage, VST: a constant voltage, VBB: a BLD voltage, the circuit 7 operates and outputs a signal if VSB>VSR. If VSR>VSB>VST and 1.5v>VSB>VBB, a signal compared with the comparator 10 is outputted. If VBB<1.5v, VST VSB and signal differing from that when VSR>VST is outputted. If VSB<VBB, the circuit 8 operates and outputs a signal. These signals are processed with the display decoder 5 and the display driver 4 and shown on a display section 3. |
