发明名称 COUNTER CONTROL CIRCUIT
摘要 PURPOSE:To ensure the accuracy by stopping the count tentatively only when a counter read request exists and correcting the count of the stopped counter after a time required to read the count. CONSTITUTION:When a counter read request exists, a counter read request signal is turned of for one system clock. Then a non-inverting output of a FF1 is turned on and the inverting output is turned off by the next system clock. Since the inverting output of the FF1 is turned off, a binary counter 2 executes no count and the output of the FF1 is turned on, a read register 4 reads the count of the binary counter 2. Then an update logic circuit 3 applies control to add '2' to the count of the binary counter 2 by the next system clock to correct the error by the count stop.
申请公布号 JPS62100023(A) 申请公布日期 1987.05.09
申请号 JP19850239405 申请日期 1985.10.28
申请人 NEC CORP 发明人 NEMOTO MASASHI
分类号 H03K21/08 主分类号 H03K21/08
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