| 摘要 |
PURPOSE:To reduce a through-current, and to realize low power consumption by constituting the titled circuit so that a resistance is inserted between a complementary P-type MOS transistor and an N-type MOS transistor. CONSTITUTION:A resistance 107 is connected between a drain of a complementary P-type MOS transistor 101 and a drain of an N-type MOS transistor 104. Also, one terminal of this resistance 107 is connected to a gate of a P-type MOS transistor 102 of the next stage, and the other terminal of the resistance 107 is connected to a gate of an N-type MOS transistor 105 of the next stage. Moreover, the gate of the driven transistor 102 is set higher than the gate of the transistor 105, by a voltage drop portion which is generated when a current flows through the resistance 107. In this way, at the time of a state transition, the time when the transistor 102 and the transistor 105 are in a conducting state simultaneously is shortened, and also the sum of the gate potential of the transistor 102 and the gate potential of the transistor 105 is made smaller than the power supply voltage, by a voltage generated across the resistance 107. In this way, a peak value of a current flowing at the time of a state transition, and the power consumption is curtailed. |
