| 摘要 |
The tetrad adder according to the subject-matter of the invention has a main circuit 1, which consists of 21 individual non-dual adder circuits, and a dual full adder 3 to process the value 5. The main circuit 1 is provided with 5 carry derivation circuits, which then derive an inner carry of value 5 to the dual full adder 3 if the sum of the main circuit = 5. After the derivation of an inner carry of value 5, the second sum formation in the main circuit 1 begins, provided that the sum or remaining sum present in the main circuit 1 is greater than the number 5. An additional circuit 2, which consists of a dual half adder 9, an OR circuit 10, a NOT circuit 11 and an AND circuit 12, is provided for conversion from 5111 code to 5211 code. <IMAGE>
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