发明名称 |
METHOD OF FORMING ELECTRODE/WIRING LAYER |
摘要 |
<p>An interconnection structure including an electrode/wiring layer can be formed on a semiconductor substrate by forming on the semiconductor substrate an insulating structure having at least one recess in a surface thereof. At least one polycrystalline silicon layer is formed to fill the recess of the insulating structure. Then, an aluminum layer is formed to cover a surface of the insulating structure and a surface of the polycrystalline silicon layer. The polycrystalline silicon in the polycrystalline silicon layer and the aluminum in a portion of the aluminum layer which corresponds to the polycrystalline silicon layer are converted into a single alloy by heating to form an electrode/wiring layer comprising the single alloy in the recess and connected to a remaining portion of the aluminum layer.</p> |
申请公布号 |
EP0119497(B1) |
申请公布日期 |
1987.05.06 |
申请号 |
EP19840101759 |
申请日期 |
1984.02.20 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
OKUMURA, KATSUYA;UEDA, MASAAKI |
分类号 |
H01L23/522;H01L21/28;H01L21/3205;H01L21/768;H01L23/485;H01L23/52;H01L23/532;(IPC1-7):H01L21/60;H01L21/90 |
主分类号 |
H01L23/522 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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