发明名称 ONE CHIP MICROCOMPUTER HAVING GATE ARRAY
摘要 <p>PURPOSE:To utilize wiring regions effectively, in a masking process, in which wirings are burned to a gate array part at a boundary between the gate array part and a computer part, by providing an interface cell, which can pull up or down signal lines or can connect and select signals in the gate array part. CONSTITUTION:The lower side of a power source 18 is a gate array part. Wiring in the gate array part is performed by using double aluminum layers. A signal from the inside of the gate array part to a microcomputer part is formed by connecting the first aluminum layer to a contact 23. When the signal from the gate array part is not required, a contact 21 and N<+> diffusion 14 are connected with the first aluminum layer and pull-up is performed. Or a contact 22 and P<+> diffusion 20 are connected with the first aluminum layer and pull- down is performed. In this cell, the microcomputer part is aligned at the boundary of the gate array part. The cell is connected to each signal line, which is inputted to the microcomputer part from the gate array part.</p>
申请公布号 JPS6297347(A) 申请公布日期 1987.05.06
申请号 JP19850237911 申请日期 1985.10.24
申请人 SEIKO EPSON CORP 发明人 YAMASHITA HIROYUKI;OSHIMA YOSHIKAZU;SATO HISAO;MIYAYAMA YOSHIYUKI
分类号 H01L27/118;G06F15/78;H01L21/82;H01L27/02 主分类号 H01L27/118
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