发明名称 BRIDGE CIRCUIT FOR INTERCONNECTING NETWORKS
摘要 <p>A BRIDGE CIRCUIT FOR INTERCONNECTING NETWORKS The present invention, in a preferred embodiment, employees at least first and second logic circuits respectively connected to first and second networks. The first and second logic circuits monitor a message being transmitted thereto to determine if it is complete and simultaneously therewith the message is temporarily stored. If the message is complete, the one of either said first or second logic circuits, which received the message, will send an interrupt signal to a microprocessor. In response to the interrupt signal the microprocessor will fetch the destination address portion of the message from the temporary storage and it will be forwarded to a look up control logic circuit which will act to compare the destination address with destination addresses that are stored in a look up memory means. Each destination address information, stored in the look up memory, will include information indicating which of the first or second networks owns the station represented by said destination address. Hence when the microprocessor receives the results of the comparison, i.e. the comparison of the destination address of the message with the destination addresses in the look up memory, it will decide whether or not to send the message through the bridge to the network not sending the message. If no match exists because there is not a destination address stored in the look up memory to match the destination address of the message, then the message will be sent to the non sending network. In addition the present invention provides a means for comparing the source address of a message with the destination addresses in the look up memory, whereby if the source address is not present it will be added to the look up memory so that the system "learns" the locations of stations for future use. In addition the present invention employees means to eliminate destination addresses from the look up memory if the stations represented by those addresses are not repeatedly used within a predetermined regular use parameter. The present system operates with a single level of address protocol (flat addressing) which provides one basis for its flexibility.</p>
申请公布号 CA1221171(A) 申请公布日期 1987.04.28
申请号 CA19840465982 申请日期 1984.10.19
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 KEMPF, MARK F.
分类号 H04L12/46;H04L12/56;(IPC1-7):G06F13/24;H04L25/02 主分类号 H04L12/46
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