发明名称 A/D CONVERTER
摘要 Clock shaping means responsive to the frequency of an incoming clock signal (CLI) produce asymmetrical clocking signals whose high to low ratio varies as a function of the frequency of CLI. The asymmetrical clocking signals when applied to A/D converters, improve their performance and extend their operating range as a function of frequency.
申请公布号 JPS6291022(A) 申请公布日期 1987.04.25
申请号 JP19860233128 申请日期 1986.09.29
申请人 RCA CORP 发明人 ANDORIYUU GOODON FURANSHISU DEINGUUOORU
分类号 H03M1/12;H03K7/08;H03M1/00 主分类号 H03M1/12
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