发明名称 WIRING SYSTEM BETWEEN MOS TRANSISTORS
摘要 PURPOSE:To contrive a reduction in the size of a cell and the improvement of layout design efficiency by a method wherein the termianls in a group that they can be mutually connected without short-circuiting on the diffusion layers are mutually connected, the terminals in other group are mutually connectddto the region pinched between the diffusion layers and moreover, the terminals in another group are so contrived as to be able to be mutually connected without short-circuiting between the terminals by modifying the configurations of the diffusion layers. CONSTITUTION:MOS transistors are realized each by being constituted of gates 2 and a diffusion layer 101 and gates 2 and a diffusion layer 102. A wiring route terminal 112 of a wiring route 11 is modified 1011 its configuration as being connected to the diffusion layers and can be used as a wiring layer producing a terminal 111. 13 and 14 of wiring routes can not be wired within the wiring region on the same element row as being short-circuited at the position of 88. As for the wiring routes 11 wirings between element rows are also divided into lateral main lines and longitudinal branch lines and the lines are mutually connected at their contacts by means of through holes. Wiring routes 15 and 16 are short-circuited (a) in the state intact, but the trouble can be solved (b) by a method wherein the configurations of the diffusion layers are expanded to the right direction as more as the length indicated by 99 and a terminal 161 is shifted to 161'.
申请公布号 JPS6289339(A) 申请公布日期 1987.04.23
申请号 JP19850228692 申请日期 1985.10.16
申请人 HITACHI LTD 发明人 SHIRAISHI YOICHI;SAKAMI JUNYA
分类号 H01L21/3205;H01L21/82;H01L23/52;H01L27/118 主分类号 H01L21/3205
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