| 摘要 |
<p>A control system has a detecting block (12) for obtaining a detected signal (Bb) corresponding to a controlled variable of a controlled system (11) and a controlling block (13) for supp. lying the controlled system with a control signal (Cs) corresponding to the detected signal. The controlling block (13) comprises an error block (3A) for producing an error signal (E) corresponding to the detected signal, a memorizing block (3C) having a plurality of memorized values corresponding to the error signal, and an output block (3B) for producing the control signal (Cs) by mixing the error signal (E) and one or more memorized values of the memorizing block. The memorizing block (3C) renews the memorized values sequentially and periodically with a value corresponding to a mixed value of the error signal (E) and a set of N memorized values, the N memorized values having been renewed at intervals of L renewing cycle periods, where each of N and L is an integer at least equal to 2. Preferably, a microprocessor (13A) excutes the tasks of the error block (3A), the memorizing block (3C) and the output block (3B).</p> |
