| 摘要 |
PURPOSE:To omit a gate for adjusting delay time, which has been required in a conventional device, by directly connecting an input buffer and output buffers, adding a parasitic capacitor formed with a P-N junction to the intermediate part of said connection, controlling an applying voltage to an N-type semiconductor from the outside, and controlling the delay time of a signal to the output buffers from the input buffer. CONSTITUTION:An input buffer 2 and output buffers 3 and 4 are directly connected. The intermediate part of the connection is connected to a P<+> type semiconductor region formed by impurity diffusion. A IV<+> region 25 formed by impurity diffusion, which is contacted with a P<+> type region 24, is provided in a semiconductor substrate 1 and taken out of the semiconductor integrated circuit through a wiring material. The outputs of the output buffers 3 and 4 are supplied in the semiconductor integrated circuit. Thus the clock signal of the outputs is synchronized with a data signal regardless of the delay in the clock and the data in a block 5. |
