发明名称 A memory test apparatus.
摘要 <p>To provide a memory test apparatus enabling to test a high-performance memory having two or more memory functions, the apparatus of the present invention includes a pattern generator (l5) for generating an algorithmic pattern to be inputted to a first memory block (2) having a first memory function of a memory under test (l) having at least two memory functions, an auxiliary pattern generator (l6) for storing an output (7) from the algorithmic pattern generator (l5) and for outputting an expected value (25) to a second memory block (3) having a second memory function of the memory (l) at a preset timing based on the stored output (7), a comparator (l7) for comparing outputs (l0, ll) from the first and second memory blocks (2, 3) with expected values for the memory functions, respectively, and a memory (20) for storing an output (27, 28) from the comparator (l7). Since algorithmic pattern generator (l5) and the auxiliary pattern generator (l6) are included, the present invention has such an effect that even if the first and second memory blocks (2, 3) of the memory under test (l) operate asynchronously, the data transfer function therebetween and the performance related to the operation timing can be tested and that a highly precise memory test apparatus can be provided. </p>
申请公布号 EP0218830(A2) 申请公布日期 1987.04.22
申请号 EP19860110848 申请日期 1986.08.06
申请人 HITACHI, LTD. 发明人 KAWAGUCHI, IKUO;HAYASHI, YOSHIHIKO
分类号 G11C29/56;(IPC1-7):G11C29/00 主分类号 G11C29/56
代理机构 代理人
主权项
地址