发明名称 METHOD FOR CHECKING MASK PATTERN
摘要 PURPOSE:To facilitate the process of conversion in to logical gates by referencing a previously registered table, by storing connection information separately for the transistors collected with respect to the output node and for the transistors collected with respect to the branch node for each group. CONSTITUTION:As to the method for storing into a matrix, a basic method is that the gate numbers of transistors obtained by tracking with one power supply node VSS, VDD are stored in the row (or column) direction. However, if they are collected in the branch node once and the tracing is performed again therefrom, the number of that branch node is stored. Since the connections of the transistors are traced and the transistor circuits are grouped so as to constitute one gate respectively, without recognizing whether the transistor connection is serial or parallel as has conventionally been done, and thereafter respectively storing the connections of the transistors within each group into the matrix separately for two classes, the branch node and the output node, it is easy to recognize the connection status and advantageous to reference to the previously registered table.
申请公布号 JPS6288324(A) 申请公布日期 1987.04.22
申请号 JP19850229536 申请日期 1985.10.15
申请人 FUJITSU LTD 发明人 OE RYOICHI
分类号 H01L21/66;G01N21/88;G01N21/93;G01N21/956;G01R31/28;G03F1/00;G03F1/84;G06F17/50;G06K9/00;H01L21/027;H01L21/30 主分类号 H01L21/66
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