| 摘要 |
PURPOSE:To attain data trace by generating 1-bit error interruption at every time a user program applies write access to a data. CONSTITUTION:A processor 1 is accessed to a memory 5 connected to a memory bus 4 via a processor bus 2 and a memory controller 3. In case of read access, an initial setting data is read and an error is detected by the read. On the other hand, in case or write access, the initial set data is read by write after read, and then the data is written in the address correctly. Since an error is detected at the read of initial setting data, the processing is applied after the end of write access and after the program address of write access and its write data are saved and stored by the processing, it is processed as the generation of 1-bit error in the write and the result is reset to the address. Thus, the data trace is attained and the troubleshooting at the generation of a problem is attained efficiently. |
