| 摘要 |
<p>PURPOSE:To prevent malfunction of a CPU by providing a reset delay circuit generated from a system clock generating circuit and retarding the release of the reset state of the CPU until a system clock signal fed to the CPU rises normally. CONSTITUTION:An operating clock generated by an oscillation circuit 2 is given to a system clock generating circuit 4, from which a system clock signal is outputted. A reset delay circuit 8 is operated by using the system clock signal and the circuit 8 starts counting the system clock signal after the release of the external reset signal is detected and when the count reaches the setting value in the reset delay circuit 8, a reset delay signal is generated to a reset circuit 10. Thus, the reset circuit 10 releases the CPU 6 from the reset state to start the operation to the CPU. Thus, malfunction of the CPU due to unmatched system clock at application of power is not caused and stable operation of a semiconductor device is guaranteed.</p> |
