发明名称 CONTROL SYSTEM FOR TRANSFERRING SERIAL DATA
摘要 PURPOSE:To eliminate the time loss produced by the transfer of data between memories by setting the start address and the range for transfer of data in response to the logical address of an information processor and transferring data between the processors of set areas. CONSTITUTION:The interface devices 1500, 2500, 3500 and 4000 are connected to a loop type serial data transmission line as nodes and then driven by the information processors 1000, 2000, 3000 and 4000 respectively. These processors have the same constitution and the processor 1000 is formed as follows. That is, the primary part of the processor consists of an information processor adaptor 1010, a logical device 1020 and a main storage 1030. In a data output mode a transfer address and a transfer range are set by an output command given from the device 1020 and by means of a main memory output address setting means 210 set in the adaptor 1010. Then data are transferred. In a data input mode a setting means 220 is actuated by an input command given from the device 1020 and the data are transferred by a transfer means 180.
申请公布号 JPS6285530(A) 申请公布日期 1987.04.20
申请号 JP19850226114 申请日期 1985.10.09
申请人 NEC CORP 发明人 OGAWA ISAMU
分类号 G06F13/00;G06F15/16;G06F15/173 主分类号 G06F13/00
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