| 摘要 |
<p>PURPOSE:To decrease a circuit scale and to lock a signal in a synchronizing state in high speed by detecting an input signal subjected to mB-nB code conversion while an addition signal is inserted and taking the synchronization to the added signal based on the detection signal. CONSTITUTION:When the mB-nB inverse converter 102 applies mB-nB conversion, an additional signal (j) is inserted and when the code subjected to mB-nB conversion is detected, a detection signal (g) is outputted. A phase shift signal is given to m/(k+l) counter 112 from the 2nd phase controller 113 according to the detection signal (g) and the synchronizing signal (f) to take the synchronization to the added signal (j). A multiplex separator 106 separates the signal subjected to inverse conversion by the mB-nB inverse converter into the main signal (i) and the added signal (j) based on the synchronizing signal (f) synchronously with the added signal (j). Thus, the circuit scale is decreased and the high speed locking into the synchronizing state is attained.</p> |
