| 摘要 |
PURPOSE:To prevent generation of a waveform distortion between input and output by adjusting the width and length of a gate pattern of each channel element so as to make the leading time and trailing time equal to each other. CONSTITUTION:When common power supplies VDD, VSS are given to a P-channel MOS-FET1 and an N-channel MOS-FET2, the width W/length L of gates Gp1, Gn1 are set in response to values K', Vth of each channel element so as to make the operating current IDS equal to each other. Thus, the leading and trailing time are made equal and generation of waveform distortion is prevented in applications such as jitter absorption in a video disc reproducing device. |
